1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more specifically, it relates to a semiconductor integrated circuit having a built-in self test: (BIST) system.
2. Description of the Related Art
Some LSIs, such as system LSIs (large-scale integrated circuits) mounted in vehicles, are utilized under difficult conditions such as high temperature or vibration. When an LSI is used under such conditions, the LSI must be tested in some way even after the LSI is installed in the product in order to ensure that the LSI is not engaged in operation after a failure occurs therein. Under normal circumstances, the LSI conducts a self test every time power to the product is turned on.
A test ROM (read only memory) having a test program written therein is normally mounted outside the LSI to enable the LSI to conduct the self test. The operation of the LSI is tested in conformance to the test program written in the test ROM when the power to the product is turned on. This type of self test is typically conducted in a product mounted with an LSI so that the product only enters the normal operating mode after it is verified that the LSI is functioning correctly.
However, the following problems arise in the self testing method described above. Firstly, the scale of the system configuration, which includes a power-on detection circuit provided outside the LSI, is bound to be large. In such a case, the presence of the test ROM itself poses an obstacle to reducing the scale of the system LSI. Secondly, since the internal operation at the LSI is executed via a CPU (central processing unit), only part of the LSI can be tested, making the accuracy of the self test less than completely reliable.